Samsung Unveils Industry's First zHBM Concept Model and 400+ Layer V10 NAND, Defining Next-Gen 3D Memory

Samsung Electronics showcased its latest AI memory portfolio and technology roadmap at the 2026 Flash Memory Summit (FMS) in Santa Clara, unveiling the industry's first zHBM concept, zNAND‑O concept, and V10 BV‑NAND with over 400 layers, along with a suite of integrated solutions designed to advance future AI infrastructure.

zHBM and zNAND‑O: Redefining the Boundaries of Next‑Generation 3D Memory

Samsung debuted the zHBM concept model, departing from the conventional side‑by‑side placement of HBM and AI processors. Instead, zHBM vertically stacks HBM directly atop the accelerator, drastically shortening data transmission paths. Purpose‑built for advanced AI computing, zHBM aims to deliver significantly higher bandwidth and energy efficiency. 

According to Samsung, A next-generation interface system incorporating zHBM is expected to deliver approximately eight times the performance of HBM5. With next-generation wafer bonding technology, zHBM can achieve more than 10 times the memory density of HBM5 while enhancing energy efficiency threefold and reducing thermal resistance by more than half, maximizing the stability and power efficiency of high-capacity, high-bandwidth systems. Additionally, zHBM also supports customer-specific designs, enabling customized IP to be integrated into the interlayer between the memory and AI accelerator to expand memory capacity and enhance accelerator performance.

Samsung also introduced zNAND-O, a next-generation high-performance NAND solution built on its V-NAND technology and in development in four- and eight-layer versions. By combining high space efficiency, improved I/O performance and low latency, zNAND-O is optimized for edge AI environments supporting real-time, data-intensive AI applications.

V10 BV‑NAND: A NAND Milestone 13 Years in the Making

Thirteen years after Samsung first introduced V‑NAND technology at FMS 2013, the company has unveiled V10 BV‑NAND flash memory at this year's FMS, featuring a new bonded V‑NAND architecture. 

With more than 400 layers, V10 BV-NAND delivers higher performance and power efficiency while significantly increasing storage density. By applying wafer bonding technology to stack memory cells, Samsung has increased memory density by approximately 58% over the previous generation (V9).

Complete AI Memory Roadmap Revealed: From HBM to PIM and Enterprise Storage

Samsung also presented its latest AI memory and storage portfolio — including HBM4E, HBM5, LPDDR5X-PIM and PM1763 — highlighting its roadmap for next-generation AI computing and data center infrastructure.

Following the industry's first mass production of HBM4 using its 1c DRAM and 4-nanometer (nm) base die technologies in February, Samsung was the first to begin shipping HBM4E samples to global customers in May, reinforcing its leadership in next-generation HBM.

Along with its HBM4E samples and HBM5 model, the company showcased its LPDDR5X-PIM, the industry's first LPDDR memory with processing-in-memory technology. The new solution is built to perform data processing within the memory itself to improve the efficiency of both data movement and power.

The exhibition also featured Samsung's latest enterprise storage solutions — including PM1763 and BM1773 — designed to meet the growing storage demands of AI data centers.