TSMC's CoPoS Pilot Line Expected to Be Completed by June

According to Taiwanese media reports, TSMC's CoPoS (Chip-on-Panel-on-Substrate) pilot production line began equipment delivery in February and is expected to be fully completed by June, with small-volume trial production scheduled for the second half of 2026. The technology is regarded as a "panelized" upgrade of TSMC's mainstream CoWoS packaging solution. It replaces the traditional circular silicon interposer with a square panel to address the decline in wafer yield caused by the increasing size of AI chips. The long-term goal is to replace the silicon interposer with a glass substrate. Industry expectations point to mass production ramping up between 2028 and 2029.