Samsung Electronics Produces First Working Die on Sub-10nm DRAM Node

According to South Korean media reports, Samsung Electronics has produced a working die for a sub-10 nanometer DRAM process, marking a milestone in overcoming scaling limits in memory manufacturing.

Industry sources said that Samsung identified a functioning die during testing of wafers fabricated last month using its 10a process. The result reflects the first application of a 4F² cell architecture and a vertical channel transistor (VCT) structure. Stacking the VCT structure horizontally forms the basis of 3D DRAM, suggesting Samsung has effectively laid the groundwork for future development. 

Unlike Samsung, Micron Technology and Chinese DRAM makers are instead pursuing a direct transition to 3D DRAM, bypassing 4F² and VCT.

It is understood that Samsung aims to complete the development of 10a DRAM this year, conduct quality testing next year, and begin mass production in 2028. The company plans to use the 4F² and VCT structures across three generations — 10a, 10b and 10c — before transitioning to 3D DRAM at 10d.