SK hynix Starts Developing 3D Stacked DRAM and Secures Partnerships with Specific Customers

Citing industry insiders, South Korean media, ZDNET, reports that SK hynix has recently launched recruitment for engineers specializing in 3D stacked DRAM logic design via its subsidiary based in San Jose, California, USA.

The design of 3D stacked DRAM logic chips is a cutting-edge stacking technology that vertically stacks DRAM directly on top of logic semiconductors (system semiconductors). Primarily targeted at the on-device AI segment, the technology is poised to emerge as a key semiconductor solution for edge AI hardware with local inference deployment in the physical AI era following generative AI.

On-device AI imposes simultaneous requirements for high memory bandwidth and low power draw, yet the conventional Package-on-Package (PoP) architecture hits performance bottlenecks. Unlike PoP, which merely stacks two discrete chips vertically, 3D stacked DRAM drastically shortens inter-die interconnect lengths and accommodates greater numbers of data channels within an identical footprint. This cuts data transfer latency while lifting energy efficiency and area utilization.

According to the report, SK hynix is speeding up the development on 3D stacked DRAM and has formed partnerships with specific customers to advance the commercial application of the technology.