CXMT LPDDR6 Latest Progress Exposed, Volume Production Expected in H2 2026

R&D Work Winding Down, Volume Production Rollout Imminent

Per industry practice, LPDDR devices typically undergo four development phases: first, die-level verification; second, R&D validation and small-scale pilot verification; and lastly, formal volume production. During R&D validation, test items include compatibility verification, system stability validation, performance and power consumption testing, mechanical reliability testing and more. The phase aims to validate design robustness and reliability, and identify potential risks in advance.

According to industry insiders cited by media outlets, R&D validation for CXMT's LPDDR6 chips is now entering the final stage, which means volume production is within reach. Industry sources previously disclosed that CXMT shipped LPDDR6 samples to core customers in March, targeting a global launch into volume production in the second half of 2026.

If follow-up pilot validation proceeds smoothly, CXMT will officially join the global LPDDR6 supply chain and compete alongside established international memory vendors.

First LPDDR6 Product Boasts Notable Improvements versus LPDDR5X

Sources indicate that CXMT's inaugural LPDDR6 product supports a data rate up to 12800 Mbps, with a baseline operating data rate of 10667 Mbps when working in tandem with system SoCs. The device features a 16Gb per-die capacity and adopts a 1295-ball POP stacked packaging configuration.

Compared with the preceding LPDDR5X, the new LPDDR6 features optimized low-power architectural design alongside upgraded RAS (Reliability, Availability, and Serviceability) functions to further boost chip operational stability.