Qualcomm has officially launched its High-Bandwidth Compute (HBC) architecture, which places the HBC accelerator beneath a stacked LPDDR memory array and achieves interconnection between the LPDDR stack and the HBC accelerator through TSV (Through-Silicon Via) technology. Compared to HBM, HBC is designed to deliver faster, more efficient, and more scalable processing at lower total cost of ownership and higher energy efficiency. Relative to competing published product specifications, HBC delivers 6x the bandwidth per watt of HBM at card-level normalization, and 200x the capacity per watt of SRAM at rack-level normalization.